High Performance Memory Controller
• Fully associative texture, color, and Z/stencil cache designs
• Hierarchical Z-buffer with Early Z test
• Lossless Z Compression (up to 48:1)
• Fast Z-Buffer Clear
• Z/stencil cache optimized for real-time shadow rendering |
Ring Bus Memory Controller
• 256-bit internal ring bus for memory reads
• Programmable intelligent arbitration logic
• Fully associative texture, color, and Z/stencil cache designs
• Hierarchical Z-buffer with Early Z test
• Lossless Z Compression (up to 48:1)
• Fast Z-Buffer Clear
• Z/stencil cache optimized for real-time shadow rendering |